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july 2003 the following document specifies spansion memory products that are now offered by both advanced micro devices and fujitsu. although the document is marked with the name of the company that orig- inally developed the specification, these products will be offered to customers of both amd and fujitsu. continuity of specifications there is no change to this datasheet as a result of offering the device as a spansion product. any changes that have been made are the result of normal datasheet improvement and are noted in the document revision summary, where supported. future routine revisions will occur when appropriate, and changes will be noted in a revision summary. continuity of ordering part numbers amd and fujitsu continue to support existing part numbers beginning with ?am? and ?mbm?. to order these products, please use only the ordering part numbers listed in this document. for more information please contact your local amd or fujitsu sales office for additional information about spansion memory solutions. am29bdd160g known good die data sheet supplement, revision 1 publication number 26994 revision a amendment 4 issue date september 9, 2004
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supplement publication no. 26994 revision a amendment 4 issue date: september 9, 2004 am29bdd160g known good die?die revision 1 16 megabit (1 m x 16-bit/512 k x 32-bit) cmos 2.5 volt-only burst mode, dual boot , simultaneous read/write flash memory distinctive characteristics architecture advantages simultaneous read/write operations ? data can be continuously read from one bank while executing erase/program functions in other bank ? zero latency between read and write operations ? two bank architecture: 75%/25% user-defined x16 or x32 data bus dual boot block ? top and bottom boot in the same device flexible sector architecture ? eight 8 kbytes, thirty 64 kbytes, and eight 8 kbytes sectors manufactured on 0.17 m process technology secsi (secured silicon) sector (256 bytes) ? factory locked and identifiabl e: 16 bytes for secure, random factory electronic serial number; remainder may be customer data programmed by amd ? customer lockable: can be read, programmed or erased just like other sectors. once locked, data cannot be changed programmable burst interface ? interface to any high performance processor ? modes of burst read operation: ? linear burst : 4 double words (x32), 8 words (x16) and double words (x32), and 32 words (x16) with wrap around single power supply operation ? optimized for 2.5 to 2.75 volt read, erase, and program operations compatibility with jedec standards (jc42.4) ? software compatible with single-power supply flash ? backward-compatible with amd am29lv and am29f flash memories performance characteristics high performance read access ? initial/random access times as fast as 64 ns ? burst access time as fast as 10 ns ultra low power consumption ? burst mode read: 90 ma @ 56 mhz max ? program/erase: 50 ma max ? standby mode: cmos: 250 a max minimum 1 million write cycles guaranteed per sector 20 year data retention at 125 c versatilei/o? control ? device generates data output voltages and tolerates data input voltages as determined by the voltage on the v io pin ? 1.65 v to 2.75 v compatible i/o signals software features persistent sector protection ? a command sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector (requires only v cc levels) password sector protection ? a sophisticated sector protection method to lock combinations of individual sectors and sector groups to prevent program or erase operations within that sector using a user-definable 64-bit password supports common flash interface (cfi) unlock bypass program command ? reduces overall programming time when issuing multiple program command sequences data# polling and toggle bits ? provides a software method of detecting program or erase operation completion hardware features program suspend/resume & erase suspend/resume ? suspends program or erase operations to allow reading, programming, or erasing in same bank hardware reset (reset#), ready/busy# (ry/by#), and write protect (wp#) inputs acc input ? accelerates programming time for higher throughput during system production quality and reliability levels equivalent to standard packaged components
2 am29bdd160g known good die?die revision 1 supplement general description the am29bdd160g in known good die (kgd) form is an 16 mbit, 2.5 volt-only flash memory. amd defines kgd as standard product in die form, tested for function- ality and speed. amd kgd products have the same reli- ability and quality as amd products in packaged form. am29bdd160g features the am29bdd160g is a 16 megabit, 2.5 volt-only sin- gle power supply burst mode flash memory device. the device can be configured for either 1,048,576 words in 16-bit mode or 524,288 double words in 32- bit mode. the device can also be programmed in stan- dard eprom programmers. the device offers a con- figurable burst interface to 16/32-bit microprocessors and microcontrollers. to eliminate bus contention, each device has separate chip enable (ce#), write enable (we#) and output en- able (oe#) controls. additional control inputs are re- quired for synchronous burst operations: load burst address valid (adv#), and clock (clk). each device requires only a single 2.5 or 2.6 volt power supply (2.5 v to 2.75 v) for both read and write functions. a 12.0-volt v pp is not required for program or erase operations, although an acceleration pin is available if faster programming performance is re- quired. the device is entirely command set compatible with the jedec single-power-supply flash standard . the unlock bypass mode facilitates faster program- ming times by requiring only two write cycles to pro- gram data instead of four. the simultaneous read/write architecture provides simultaneous operation by dividing the memory space into two banks. the device can begin programming or erasing in one bank, and then simultaneously read from the other bank, with zero latency. the device provides a 256-byte secsi? (secured silicon) sector with an one-time-programmable (otp) mechanism. in addition, the device features several levels of sector protection, which can disable both the program and erase operations in certain sectors or sector groups: persistent sector protection is a command sector protection method that replaces the old 12 v con- trolled protection method; password sector protec- tion is a highly sophisticated protection method that requires a password before changes to certain sectors or sector groups are permitted; wp# hardware pro- tection prevents program or erase in the two outer- most 8 kbytes sectors of the larger bank. the device defaults to the persistent sector protection mode. the customer must then choose if the standard or password protection method is most desirable. the wp# hardware protection feature is always available, independent of the other protection method chosen. the versatilei/o? (v ccq ) feature allows the output voltage generated on the device to be determined based on the v io level. this feature allows this device to operate in the 1.8 v i/o environment, driving and re- ceiving signals to and from other 1.8 v devices on the same bus. in addition, inputs and i/os that are driven externally are capable of handling 3.6 v. the host system can detect whether a program or erase operation is complete by observing the ry/by# pin, by reading the dq7 (data# polling), or dq6 (tog- gle) status bits . after a program or erase cycle has been completed, the device is ready to read array data or accept another command. the sector erase architecture allows memory sec- tors to be erased and reprogrammed without affecting the data contents of other sectors. the device is fully erased when shipped from the factory. hardware data protection measures include a low v cc detector that automatically inhibits write opera- tions during power transitions. the password and software sector protection feature disables both pro- gram and erase operations in any combination of sec- tors of memory. this can be achieved in-system at v cc level. the program/erase suspend/erase resume fea- ture enables the user to put erase on hold for any pe- riod of time to read data from, or program data to, any sector that is not selected for erasure. true back- ground erase can thus be achieved. the hardware reset# pin terminates any operation in progress and resets the internal state machine to reading array data. the device offers two power-saving features. when addresses have been stable for a specified amount of time, the device enters the automatic sleep mode . the system can also place the device into the standby mode . power consumption is greatly re- duced in both these modes. amd?s flash technology combines years of flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effective- ness. the device electrically erases all bits within a sector simultaneously via fowler-nordheim tun- neling. the data is programmed using hot electron injec- tion. electrical specifications refer to the am29bdd160g data sheet, publication number 24960, for full electrical specifications on the am29bdd160g in kgd form.
am29bdd160g known good die?die revision 1 3 supplement product selector guide die photograph die pad locations part number am29bdd160 kgd standard voltage range: v cc = 2.5 ? 2.75 v synchronous/burst or asynchronous speed option (clock rate) 64c (56 mhz) 65a (40 mhz) max initial/asynchronous access time, ns (t acc )64 67 max burst access delay (ns) 10 17 max clock rate (mhz) 56 40 max ce# access, ns (t ce )6971 max oe# access, ns (t oe )2028 10 11 12 38 41 9 8 7 6 5 4 3 2 1 76 75 74 73 72 71 37 36 35 34 33 32 47 46 45 44 43 42 40 39 amd logo location 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 60 59 58 57 56 55 54 53 52 51 50 49 48 61 62 63 64 65 66 67 68 69 70
4 am29bdd160g known good die?die revision 1 supplement pad description pads relative to die center. pad signal pad center (mils) pad center (millimeters) xyxy 1v cc ?0.56 137.36 ?0.01 3.49 2 ce# ?5.56 137.36 ?0.14 3.49 3 oe# ?10.92 137.36 ?0.28 3.49 4 we# ?17.34 137.36 ?0.45 3.49 5 wp# ?23.37 137.36 ?0.59 3.49 6 ind/wait# ?38.38 139.77 ?0.97 3.55 7 word# ?53.99 137.36 ?1.37 3.49 8 dq16 ?75.30 131.69 ?1.91 3.34 9 dq17 ?75.30 123.36 ?1.91 3.13 10 dq18 ?75.30 115.02 ?1.91 2.92 11 dq19 ?75.30 106.69 ?1.91 2.71 12 v ccq ?75.30 100.30 ?1.91 2.55 13 v ss ?75.30 88.18 ?1.91 2.24 14 dq20 ?75.30 81.89 ?1.91 2.08 15 dq21 ?75.30 73.56 ?1.91 1.87 16 dq22 ?75.30 65.23 ?1.91 1.66 17 dq23 ?75.30 56.90 ?1.91 1.45 18 dq24 ?75.30 ?30.34 ?1.91 ?0.77 19 dq25 ?75.30 ?38.67 ?1.91 ?0.98 20 dq26 ?75.30 ?46.99 ?1.91 ?1.19 21 dq27 ?75.30 ?55.33 ?1.91 ?1.41 22 v ccq ?75.30 ?61.69 ?1.91 ?1.57 23 v ss ?75.30 ?73.71 ?1.91 ?1.87 24 dq28 ?75.30 ?80.04 ?1.91 ?2.03 25 dq29 ?75.30 ?88.38 ?1.91 ?2.24 26 dq30 ?75.30 ?96.71 ?1.91 ?2.46 27 dq31 ?75.30 ?105.04 ?1.91 ?2.67 28 a-1 ?75.30 ?113.55 ?1.91 ?2.88 29 a0 ?75.30 ?120.37 ?1.91 ?3.06 30 a1 ?75.30 ?125.73 ?1.91 ?3.19 31 a2 ?75.30 ?132.55 ?1.91 ?3.37 32 a3 ?57.26 ?137.01 ?1.45 ?3.48 33 a4 ?50.44 ?137.01 ?1.28 ?3.48 34 a5 ?45.08 ?137.01 ?1.15 ?3.48 35 a6 ?38.27 ?137.01 ?0.97 ?3.48 36 a7 ?32.91 ?137.01 ?0.84 ?3.48 37 a8 ?26.09 ?137.01 ?0.66 ?3.48 38 v ss ?20.69 ?137.01 ?0.53 ?3.48 39 acc ?14.40 ?137.01 ?0.37 ?3.48 40 v cc ?8.74 ?137.01 ?0.22 ?3.48 41 a9 7.49 ?137.01 0.19 ?3.48 42 a10 14.49 ?137.01 0.37 ?3.48 43 a11 19.85 ?137.01 0.50 ?3.48 44 a12 26.67 ?137.01 0.68 ?3.48 45 a13 32.03 ?137.01 0.81 ?3.48 46 a14 38.84 ?137.01 0.99 ?3.48 47 a15 44.20 ?137.01 1.12 ?3.48 48 a16 75.36 ?130.61 1.91 ?3.32
am29bdd160g known good die?die revision 1 5 supplement note: the coordinates above are relative to the die center and can be used to operate wire bonding equipment. 49 a17 75.36 ?123.80 1.91 ?3.14 50 a18 75.36 ?118.44 1.91 ?3.01 51 dq0 75.34 ?107.97 1.91 ?2.74 52 dq1 75.34 ?99.65 1.91 ?2.53 53 dq2 75.34 ?91.31 1.91 ?2.32 54 dq3 75.34 ?82.98 1.91 ?2.11 55 v ccq 75.34 ?76.72 1.91 ?1.95 56 v ss 75.34 ?64.58 1.91 ?1.64 57 dq4 75.34 ?58.29 1.91 ?1.48 58 dq5 75.34 ?49.96 1.91 ?1.27 59 dq6 75.34 ?41.63 1.91 ?1.06 60 dq7 75.34 ?33.29 1.91 ?0.85 61 dq8 75.34 55.77 1.91 1.42 62 dq9 75.34 64.09 1.91 1.63 63 dq10 75.34 72.43 1.91 1.84 64 dq11 75.34 80.76 1.91 2.05 65 v ccq 75.34 87.02 1.91 2.21 66 v ss 75.34 99.14 1.91 2.52 67 dq12 75.34 105.53 1.91 2.68 68 dq13 75.34 113.86 1.91 2.89 69 dq14 75.34 122.19 1.91 3.10 70 dq15 75.34 130.52 1.91 3.32 71 v ccq 54.86 137.36 1.39 3.49 72 reset# 48.74 137.36 1.24 3.49 73 clk 43.38 137.36 1.10 3.49 74 ry/by# 31.18 139.77 0.79 3.55 75 adv# 17.45 137.36 0.44 3.49 76 v ss 11.88 137.36 0.30 3.49 pad signal pad center (mils) pad center (millimeters) xyxy
6 am29bdd160g known good die?die revision 1 supplement pad description pads relative to v cc . pad signal pad center (mils) pad center (millimeters) xyxy 1v cc 0.00 0.00 0.00 0.00 2 ce# ?5.00 0.00 ?0.13 0.00 3 oe# ?10.36 0.00 ?0.27 0.00 4 we# ?16.78 0.00 ?0.44 0.00 5 wp# ?22.81 0.00 ?0.58 0.00 6 ind/wait# ?37.82 2.41 ?0.96 0.06 7 word# ?53.43 0.00 ?1.36 0.00 8 dq16 ?74.74 ?5.67 ?1.90 ?0.15 9 dq17 ?74.74 ?14.00 ?1.90 ?0.36 10 dq18 ?74.74 ?22.34 ?1.90 ?0.57 11 dq19 ?74.74 ?30.67 ?1.90 ?0.78 12 v ccq ?74.74 ?37.06 ?1.90 ?0.94 13 v ss ?74.74 ?49.18 ?1.90 ?1.25 14 dq20 ?74.74 ?55.47 ?1.90 ?1.41 15 dq21 ?74.74 ?63.80 ?1.90 ?1.62 16 dq22 ?74.74 ?72.13 ?1.90 ?1.83 17 dq23 ?74.74 ?80.46 ?1.90 ?2.04 18 dq24 ?74.74 ?167.70 ?1.90 ?4.26 19 dq25 ?74.74 ?176.03 ?1.90 ?4.47 20 dq26 ?74.74 ?184.35 ?1.90 ?4.68 21 dq27 ?74.74 ?192.69 ?1.90 ?4.90 22 v ccq ?74.74 ?199.05 ?1.90 ?5.06 23 v ss ?74.74 ?211.07 ?1.90 ?5.36 24 dq28 ?74.74 ?217.40 ?1.90 ?5.52 25 dq29 ?74.74 ?225.74 ?1.90 ?5.73 26 dq30 ?74.74 ?234.07 ?1.90 ?5.95 27 dq31 ?74.74 ?242.40 ?1.90 ?6.16 28 a-1 ?74.74 ?250.91 ?1.90 ?6.37 29 a0 ?74.74 ?257.73 ?1.90 ?6.55 30 a1 ?74.74 ?263.09 ?1.90 ?6.68 31 a2 ?74.74 ?269.91 ?1.90 ?6.86 32 a3 ?56.7 ?274.37 ?1.44 ?6.97 33 a4 ?49.88 ?274.37 ?1.27 ?6.97 34 a5 ?44.52 ?274.37 ?1.14 ?6.97 35 a6 ?37.71 ?274.37 ?0.96 ?6.97 36 a7 ?32.35 ?274.37 ?0.83 ?6.97 37 a8 ?25.53 ?274.37 ?0.65 ?6.97 38 v ss ?20.13 ?274.37 ?0.52 ?6.97 39 acc ?13.84 ?274.37 ?0.36 ?6.97 40 v cc ?8.18 ?274.37 ?0.23 ?6.97 41 a9 8.05 ?274.37 0.20 ?6.97 42 a10 15.05 ?274.37 0.38 ?6.97 43 a11 20.41 ?274.37 0.51 ?6.97 44 a12 27.23 ?274.37 0.69 ?6.97 45 a13 32.59 ?274.37 0.82 ?6.97 46 a14 39.40 ?274.37 1.00 ?6.97 47 a15 44.76 ?274.37 1.13 ?6.97 48 a16 75.92 ?267.97 1.92 ?6.81
am29bdd160g known good die?die revision 1 7 supplement note: the coordinates above are relative to the center of pad 1 and can be used to operate wire bonding equipment. 49 a17 75.92 ?261.16 1.92 ?6.63 50 a18 75.92 ?255.80 1.92 ?6.50 51 dq0 75.90 ?245.33 1.92 ?6.23 52 dq1 75.90 ?237.01 1.92 ?6.02 53 dq2 75.90 ?228.67 1.92 ?5.81 54 dq3 75.90 ?220.34 1.92 ?5.60 55 v ccq 75.90 ?214.08 1.92 ?5.44 56 v ss 75.90 ?201.94 1.92 ?5.13 57 dq4 75.90 ?195.65 1.92 ?4.97 58 dq5 75.90 ?187.32 1.92 ?4.76 59 dq6 75.90 ?178.99 1.92 ?4.55 60 dq7 75.90 ?170.65 1.92 ?4.34 61 dq8 75.90 ?81.59 1.92 ?2.07 62 dq9 75.90 ?73.27 1.92 ?1.86 63 dq10 75.90 ?64.93 1.92 ?1.65 64 dq11 75.90 ?56.60 1.92 ?1.44 65 v ccq 75.90 ?50.34 1.92 ?1.28 66 v ss 75.90 ?38.22 1.92 ?0.97 67 dq12 75.90 ?31.83 1.92 ?0.81 68 dq13 75.90 ?23.50 1.92 ?0.60 69 dq14 79.27 ?15.17 2.01 ?0.39 70 dq15 79.27 ?6.84 2.01 ?0.17 71 v ccq 55.42 0.00 1.40 0.00 72 reset# 49.30 0.00 1.25 0.00 73 clk 43.94 0.00 1.11 0.00 74 ry/by# 31.74 2.41 0.80 0.06 75 adv# 18.01 0.00 0.45 0.00 76 v ss 12.44 0.00 0.31 0.00 pad signal pad center (mils) pad center (millimeters) xyxy
8 am29bdd160g known good die?die revision 1 supplement ordering information standard products amd standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the following: valid combinations valid combinations list configurations planned to be sup- ported in volume for this device. consult the local amd sales office to confirm availability of specific valid combinations and to check on newly released combinations. am29bdd160 g t 64 c dp e 1 die revision this number refers to the specific amd manufacturing process and product technology reflected in this document. it is entered in the revision field of amd standard product nomenclature. temperature range i = industrial (?40 c to +85 c) e = extended (?40 c to +125 c) h = super extended (?40 c to +145 c) package type and minimum order quantity de = embossed tape and reel dp = waffle pack 140 die per 5 tray stack dg = gel-pak? die tray 66 die per 6 tray stack dt = surftape? (tape and reel) 1600 per 7-inch reel clock rate a = 40 mhz c = 56 mhz speed option see product selector guide and valid combinations boot code sector architecture t = top sector b = bottom sector process technology g = 0.17 m device number/description am29bdd160 known good die 8 megabit (1 m x 16-bit/512 k x 32-bit) cmos flash memory?die revision 1 2.5 volt-only program and erase valid combinations am29bdd160gt-64c am29bdd160gb-64c dpi 1, dpe 1, dph1 dgi 1, dge 1, dgh1 dti 1, dte 1, dth1 dei 1, dee 1, deh 1 am29bdd160gt-65a am29bdd160gb-65a
am29bdd160g known good die?die revision 1 9 supplement packaging information surftape packaging gel-pak and waffle pack packaging direction of feed orientation relative to leading edge of tape and reel 16 mm amd logo location orientation relative to top left corner of gel-pak and waffle pack cavity plate amd logo location
10 am29bdd160g known good die?die revision 1 supplement embossed tape packaging direction of feed orientation relative to leading edge of tape 16 mm amd logo location
am29bdd160g known good die?die revision 1 11 supplement product test flow figure 1 provides an overview of amd?s known good die test flow. for more detailed information, refer to the am29bdd160g product qualification database. amd implements quality assurance procedures throughout the product test flow. these qa procedures also allow amd to produce kgd products without requiring or implementing burn-in. in addition, an off-line quality monitoring program (qmp) further guarantees amd quality standards are met on known good die prod- ucts. figure 1. amd kgd product test flow wafer sort 1 bake 24 hours at 250 c wafer sort 2 wafer sort 3 high temperature packaging for shipment shipment dc parameters functionality programmability erasability data retention dc parameters functionality programmability erasability dc parameters functionality programmability erasability speed incoming inspection wafer saw die separation 100% visual inspection die pack
12 am29bdd160g known good die?die revision 1 supplement absolute maximum ratings ambient temperature with power applied. . . . . . . . . . . . . . ?40c to +145c v cc /v io (note 1). . . . . . . . . . . . . . ?0.5 v to + 3.0 v a9 , oe# , and reset# (note 2) . . ?0.5 v to +13.0 v addresses, data, control signals (with the exception of clk) . . . . . . . ?0.5 v to 3.6 v all other pins (note 1). . . . . . . . . . .?0.5 v to +5.5 v output short circuit current (note 3) . . . . . . 200 ma notes: 1. minimum dc voltage on input or i/o pins is ?0.5 v. during voltage transitions, input at i/o pins may overshoot v ss to ?2.0 v for periods of up to 20 ns. see figure 13. maximum dc voltage on output and i/o pins is 3.6 v. during voltage transitions output pins may overshoot to v cc + 2.0 v for periods up to 20 ns. see figure 14. 2. minimum dc input voltage on pins a9, oe#, and reset# is -0.5 v. during voltage transitions, a9, oe#, and reset# may overshoot v ss to ?2.0 v for periods of up to 20 ns. see figure 13. maximum dc input voltage on pin a9 and oe# is +13.0 v which may overshoot to 14.0 v for periods up to 20 ns. 3. no more than one output may be shorted to ground at a time. duration of the short circuit should not be greater than one second. 4. stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only; functional operation of the de- vice at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. exposure of the device to absolute maximum rating condi- tions for extended periods may affect device reliability. figure 1. maximum negative overshoot waveform figure 2. maximum positive overshoot waveform operating ranges industrial (i) devices ambient temperature (t a ) . . . . . . . . . ?40c to +85c extended (e) devices ambient temperature (t a ) . . . . . . . . ?40c to +125c v cc supply voltages v cc for regulated voltage range. . . . . . 2.5 v to 2.75 v v io supply voltages v io . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.65 v to 2.75 v operating ranges define those limits between which the functionality of the device is guaranteed. 20 ns 20 ns +0.8 v ?0.5 v 20 ns ?2.0 v 20 ns 20 ns v cc +2.0 v v cc +0.5 v 20 ns 2.0 v
am29bdd160g known good die?die revision 1 13 supplement physical specifications die dimensions . . . . . . . . . . . . . . . 179 mils x 295mils . . . . . . . . . . . . . . . . . . . . . . . . . . 4.54 mm x 7.50 mm die thickness. . . . . . . . . . . . . . . . . . . . . . . . . .500 m bond pad size . . . . . . . . . . . . . . 3.43 mils x 3.43 mils . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 m x 87 m pad area free of passivation . . . . . . . . .264.72 mils 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6,724 m 2 pads per die . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76 bond pad metalization . . . . . . . . . . . . . . . . . . . . al/cu die backside . . . . . . . . . . . . . . . . . . . . . . . . no metal, may be grounded (optional) passivation . . . . . . . . . . . . . . . . . . . . . . . sin/sog/sin dc operating conditions v cc (supply voltage) . . . . . . . . . . . . . . 2.5 v to 2.75 v operating temperature industrial . . . . . . . . . . . . . . . . . . . ?40 c to +85 c extended . . . . . . . . . . . . . . . . . ?40 c to +125 c super extended . . . . . . . . . . . . ?40 c to +145 c v io supply voltages v io . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.65 v to 2.75 v manufacturing information manufacturing . . . . . . . . . . . . . . . . . . . . . . . . . . . fasl test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . kyec manufacturing id (top boot) . . . . . . . . . . . . .98p03ak (bottom boot). . . . . . . . 98p03abk preparation for shipment . . . . . . . . penang, malaysia fabrication process . . . . . . . . . . . . . . . . . . . cs59ls die revision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 special handling instructions processing do not expose kgd products to ultraviolet light or process them at temperatures greater than 250 c. failure to adhere to these handling instructions will result in irreparable damage to the devices. for best yield, amd recommends assembly in a class 10k clean room with 30% to 60% relative humidity. storage store at a maximum temperature of 30 c in a nitrogen- purged cabinet or vacuum-sealed bag. observe all standard esd handling procedures.
14 am29bdd160g known good die?die revision 1 supplement dc characteristics for kgd devices at 145 c cmos compatible notes: 1. current maximum has been significantly increased (x27) from kgd supplement revision a, amendment 1, dated april 21, 2003. 2. the i cc current listed includes both the dc operating current and the frequency dependent component. ac characteristics erase/program operation ? kgd devices at 145 c alternate ce# controlled erase/program operation ? kgd devices at 145 c parameter description test conditions min typ max unit i cc1 v cc active asynchronous read current ce# = v il , oe# = v il 1 mhz 25 50 ma i cc5 (note 1) v cc standby current (cmos) v cc = v ccmax , ce# = v cc 0.3 v 15 250 a i cc7 (note 1) v cc reset current reset = v il 250 a i cc8 (note 1) automatic sleep mode current v ih = v cc 0.3 v, v il = v ss 0.3 v 250 a parameter description all speed options unit jedec std t dh data hold from we# rising edge min 2 ns parameter description all speed options unit jedec std t dh data hold from we# rising edge min 2 ns
am29bdd160g known good die?die revision 1 15 supplement terms and conditions of sale for amd non-volatile memory die all transactions relating to unpackaged die under this agreement shall be subject to amd?s standard terms and conditions of sale, or any revisions thereof, which revisions amd reserves the right to make at any time and from time to time. in the event of conflict between the provisions of amd?s standard terms and conditions of sale and this agreement, the terms of this agreement shall be controlling. amd warrants its manufactured unpackaged die whether shipped to customer in individual dice or wafer form ("known good die," "kgd", "die," "known good wafer", "kgw", or wafer(s)) will meet amd's published specifications and against defective materials or work- manship for a period of one (1) year from date of ship- ment. this limited warranty does not extend beyond the first purchaser of said die or wafer(s). buyer assumes full responsibility to ensure compliance with the appropriate handling, assembly and pro- cessing of kgd or kgw (including but not limited to proper die preparation, die attach, backgrinding, sin- gulation, wire bonding and related assembly and test activities), and compliance with all guidelines set forth in amd's specifications for kgd or kgw, and amd assumes no responsibility for environmental effects on kgd or kgw or for any activity of buyer or a third party that damages the die or wafer(s) due to improper use, abuse, negligence, improper installation, improper backgrinding, improper singulation, accident, loss, damage in transit, or unauthorized repair or alteration by a person or entity other than amd ("limited war- ranty exclusions") the liability of amd under this limited warranty is lim- ited, at amd's option, solely to repair the die or wafer(s), to send replacement die or wafer(s), or to make an appropriate credit adjustment or refund in an amount not to exceed the original purchase price actu- ally paid for the die or wafer(s) returned to amd, pro- vided that: (a) amd is promptly notified by buyer in writing during the applicable warranty period of any defect or nonconformity in the die or wafer(s); (b) buyer obtains authorization from amd to return the defective die or wafer(s); (c) the defective die or wafer(s) is returned to amd by buyer in accordance with amd's shipping instructions set forth below; and (d) buyer shows to amd's satisfaction that such alleged defect or nonconformity actually exists and was not caused by any of the above-referenced warranty exclusions. buyer shall ship such defective die or wafer(s) to amd via amd's carrier, collect. risk of loss will transfer to amd when the defective die or wafer(s) is provided to amd's carrier. if buyer fails to adhere to these warranty returns guidelines, buyer shall assume all risk of loss and shall pay for all freight to amd's specified location. the aforementioned provisions do not extend the original limited warranty period of any die or wafer(s) that has either been replaced by amd. this limited warranty is expressed in lieu of all other warranties, expressed or implied, including the implied warranty of fitness for a particular purpose, the implied warranty of merchantability or noninfringement and of all other obliga- tions or liabilities on amd's part, and it neither assumes nor authorizes any other person to assume for amd any other liabilities. the foregoing consti- tutes the buyer's sole and exclusive remedy for the furnishing of defective or non conforming known good die or known good wafer(s) and amd shall not in any event be liable for increased manu- facturing costs, downtime costs, damages relating to buyer's procure- ment of substitute die or wafer(s) (i.e., "cost of cover"), loss of profits, reve- nues or goodwill, loss of use of ordamage to any associated equipment, or any other indirect, incidental, special or consequential damages by reason of the fact that such known good die or known good wafer(s) shall have been determined to be defective or non con- forming. buyer agrees that it will make no warranty representa- tions to its customers which exceed those given by amd to buyer unless and until buyer shall agree to indemnify amd in writing for any claims which exceed amd's limited warranty. known good die or known good wafer(s) are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of the die or wafer(s) can reasonably be expected to result in a personal injury. buyer's use of known good die or known good wafer(s) for use in life support applications is at buyer's own risk and buyer agrees to fully indemnify amd for any damages resulting in such use or sale. known good die or known good wafer are not designed or authorized for use as components in life support appliances, devices or systems where mal- function of the die or wafer can reasonably be expected to result in a personal injury. buyer's use of known good die or known good wafer for use in life support applications is at buyer's own risk and buyer agrees to fully indemnify amd for any damages resulting in such use or sale.
16 am29bdd160g known good die?die revision 1 supplement revision summary revision a (december 10, 2002) initial release. revision a + 1 (april 21, 2003) distinctive characteristics architectural advantages, single power supply opera- tion: changed 2.7 volt to 2.75 volt. performance characteristics, ultra low power con- sumption: changed standby mode: cmos to 60 a max. product selector guide removed min initial clock delay absolute maximum ratings added this new section. dc operating conditions changed v cc from 2.5 v ? 2.7 v to 2.5 v ? 2.75 v. added v io supply voltages. ac characteristics cmos compatible: changed i cc5 max to 60 a . erase/program operation: changed t dh speed to 2 ns. alternate ce# controlled erase/program operation: changed t dh speed to 2 ns. terms and conditions of sale for amd non-volatile memory die revised text following first paragraph. revision a + 2 (may 9, 2003) performance characteristics ultra low power consumption: changed standby mode: cmos to 250 a product selector guide changed t acc for 65a (40 mhz) to 67 ns. ac characteristics for kgd devices at 145c, cmos compatible changed i cc5 max to 250, added i cc7 , i cc8 , added note 1. revision a + 3 (july 16, 2003) pad description table pads relative to v cc : corrected signal names for pads 35 to 51. revision a + 4 (september 9, 2003) packaging information added embossed tape and reel packaging. trademarks copyright ? 2004 advanced micro devices, inc. all rights reserved. amd, the amd logo, and combinations thereof are r egistered trademarks of advanced micro devices, inc. product names used in this publication are for identification pur poses only and may be trademarks of their respective companies .

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